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| author | Claudiu Beznea <[email protected]> | 2023-10-10 13:26:57 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2023-10-12 18:05:52 +0000 |
| commit | 4bce4bedbe6daa54cf701184601f913a0c00bb1c (patch) | |
| tree | 0c9f96ba77b1edf1eafbc7ca21b1bd4248c17146 /drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | |
| parent | clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R() (diff) | |
| download | kernel-4bce4bedbe6daa54cf701184601f913a0c00bb1c.tar.gz kernel-4bce4bedbe6daa54cf701184601f913a0c00bb1c.zip | |
clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2
Add clock and reset support for the SDHI1 and SDHI2 blocks on the
RZ/G3S (R9A08G045) SoC.
Signed-off-by: Claudiu Beznea <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c')
0 files changed, 0 insertions, 0 deletions