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| author | Mario Kleiner <[email protected]> | 2017-03-29 20:09:12 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2017-04-07 16:20:42 +0000 |
| commit | e190ed1ea7458e446230de4113cc5d53b8dc4ec8 (patch) | |
| tree | 2fb0f028c091782b1012f06750880ec2765aeb23 /drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | |
| parent | drm/amdgpu: Make display watermark calculations more accurate (diff) | |
| download | kernel-e190ed1ea7458e446230de4113cc5d53b8dc4ec8.tar.gz kernel-e190ed1ea7458e446230de4113cc5d53b8dc4ec8.zip | |
drm/amdgpu: Avoid overflows/divide-by-zero in latency_watermark calculations.
At dot clocks > approx. 250 Mhz, some of these calcs will overflow and
cause miscalculation of latency watermarks, and for some overflows also
divide-by-zero driver crash ("divide error: 0000 [#1] PREEMPT SMP" in
"dce_v10_0_latency_watermark+0x12d/0x190").
This zero-divide happened, e.g., on AMD Tonga Pro under DCE-10,
on a Displayport panel when trying to set a video mode of 2560x1440
at 165 Hz vrefresh with a dot clock of 635.540 Mhz.
Refine calculations to avoid the overflows.
Tested for DCE-10 with R9 380 Tonga + ASUS ROG PG279 panel.
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Mario Kleiner <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c')
0 files changed, 0 insertions, 0 deletions