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| author | Gabriel Fernandez <[email protected]> | 2016-12-14 14:22:28 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2016-12-22 00:33:14 +0000 |
| commit | 3868f132cce6abab089fd6b12d6a7333712ade83 (patch) | |
| tree | 7079125030caec17ec98c97ccb5dee734c65ae02 /drivers/fpga/zynq-fpga.c | |
| parent | clk: renesas: mstp: Support 8-bit registers for r7s72100 (diff) | |
| download | kernel-3868f132cce6abab089fd6b12d6a7333712ade83.tar.gz kernel-3868f132cce6abab089fd6b12d6a7333712ade83.zip | |
clk: stm32f4: Use CLK_OF_DECLARE_DRIVER initialization method
Clock and reset controller use same compatible strings (same IP).
Since commit 989eafd0b609 ("clk: core: Avoid double initialization of
clocks") the OF core flags clock controllers registered with the
CLK_OF_DECLARE() macro as OF_POPULATED, so platform devices with the same
compatible string will not be registered.
Signed-off-by: Gabriel Fernandez <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'drivers/fpga/zynq-fpga.c')
0 files changed, 0 insertions, 0 deletions