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| author | Jonas Gorski <[email protected]> | 2019-04-18 11:12:06 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2019-04-23 17:57:48 +0000 |
| commit | d1c8a501ec07290da5cc2d8dedb6692cf89078d8 (patch) | |
| tree | e5a3bf9dd51357e5e87a08ac1b346c6fb8b35d69 /drivers/fpga/xilinx-spi.c | |
| parent | clk: fractional-divider: add explicit big endian support (diff) | |
| download | kernel-d1c8a501ec07290da5cc2d8dedb6692cf89078d8.tar.gz kernel-d1c8a501ec07290da5cc2d8dedb6692cf89078d8.zip | |
clk: gate: add explicit big endian support
Add a clock specific flag to switch register accesses to big endian, to
allow runtime configuration of big endian gated clocks.
Signed-off-by: Jonas Gorski <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'drivers/fpga/xilinx-spi.c')
0 files changed, 0 insertions, 0 deletions