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authorDavid Abdurachmanov <[email protected]>2021-06-13 00:43:57 +0000
committerPalmer Dabbelt <[email protected]>2021-06-19 07:11:53 +0000
commit7ede12b01b59dc67bef2e2035297dd2da5bfe427 (patch)
treedcf04066281ea4fbbcc7db709bf462862fde2d69 /drivers/cpufreq/cppc_cpufreq.c
parentriscv: Ensure BPF_JIT_REGION_START aligned with PMD size (diff)
downloadkernel-7ede12b01b59dc67bef2e2035297dd2da5bfe427.tar.gz
kernel-7ede12b01b59dc67bef2e2035297dd2da5bfe427.zip
riscv: dts: fu740: fix cache-controller interrupts
The order of interrupt numbers is incorrect. The order for FU740 is: DirError, DataError, DataFail, DirFail From SiFive FU740-C000 Manual: 19 - L2 Cache DirError 20 - L2 Cache DirFail 21 - L2 Cache DataError 22 - L2 Cache DataFail Signed-off-by: David Abdurachmanov <[email protected]> Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'drivers/cpufreq/cppc_cpufreq.c')
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