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| author | Jason A. Donenfeld <[email protected]> | 2018-10-02 14:01:24 +0000 |
|---|---|---|
| committer | Russell King <[email protected]> | 2018-10-04 13:48:59 +0000 |
| commit | 8403bcb779a0be4080510c59b1a582e6ab7a748c (patch) | |
| tree | 98336755cac0cf00e7d94cfd724f9c2605aca144 /arch/arm/include/asm/assembler.h | |
| parent | ARM: 8800/1: use choice for kernel unwinders (diff) | |
| download | kernel-8403bcb779a0be4080510c59b1a582e6ab7a748c.tar.gz kernel-8403bcb779a0be4080510c59b1a582e6ab7a748c.zip | |
ARM: 8801/1: makefile: use ARMv3M mode for RiscPC
The purpose of CONFIG_CPU_32v3 is to avoid ldrh/strh on the RiscPC,
which is pretty much an ARMv4 device, except its bus will choke on the
half-words. The way to make the C compiler not output ldrh/strh is with
-march=armv3, which doesn't support them in the ISA. However, this
prevents certain cryptography code from working that uses instructions
like umull. Fortunately there's also -march=armv3m that does support
those, making it possible to continue assembling optimized cryptography
routines for our beloved RiscPC.
Signed-off-by: Jason A. Donenfeld <[email protected]>
Acked-by: Ard Biesheuvel <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
Signed-off-by: Russell King <[email protected]>
Diffstat (limited to 'arch/arm/include/asm/assembler.h')
0 files changed, 0 insertions, 0 deletions