From 4fe51b0ad523d1863533b2c1f395ace6bf06fddf Mon Sep 17 00:00:00 2001 From: Dmitry Misharov Date: Tue, 6 Oct 2026 15:04:07 +0200 Subject: CI: give the cross-compile matrix jobs stable names GitHub names a matrix job after all its matrix values and cuts the name at 100 characters, so the aarch64 and riscv legs report identical names. Nothing reading job results by name can then tell whether every leg ran or which one failed. Name the jobs after a short per-entry label instead, as interop-tests.yml already does. Assisted-by: Claude:claude-opus-5-5 Reviewed-by: Neil Horman Reviewed-by: Bob Beck Merge-date: Wed Oct 21 16:48:12 2026 Merged-from: https://github.com/openssl/openssl/pull/33121 --- .github/workflows/aarch64-more-cross-compiles.yml | 1 + .github/workflows/cross-compiles.yml | 21 +++++++++++++++++++++ .github/workflows/riscv-more-cross-compiles.yml | 15 +++++++++++++++ 3 files changed, 37 insertions(+) diff --git a/.github/workflows/aarch64-more-cross-compiles.yml b/.github/workflows/aarch64-more-cross-compiles.yml index 8f9ca5f6268..f1bd6780eac 100644 --- a/.github/workflows/aarch64-more-cross-compiles.yml +++ b/.github/workflows/aarch64-more-cross-compiles.yml @@ -51,6 +51,7 @@ jobs: check_run_id: ${{ inputs.check_run_id }} cross-compilation-aarch64: + name: cross-compilation-aarch64 (${{ matrix.platform.capslabel }}) # pull request title contains 'aarch64' # pull request title contains 'arm64' # pull request body contains '[aarch64 ci]' diff --git a/.github/workflows/cross-compiles.yml b/.github/workflows/cross-compiles.yml index 25a8486e132..e43f4c04296 100644 --- a/.github/workflows/cross-compiles.yml +++ b/.github/workflows/cross-compiles.yml @@ -33,6 +33,7 @@ permissions: jobs: cross-compilation: + name: cross-compilation (${{ matrix.platform.label || matrix.platform.arch }}) # Run the full test suite on push, and on pull requests labelled with # 'extended tests'. Other pull requests only run the EVP tests. env: @@ -74,28 +75,33 @@ jobs: platform: [ { arch: i386-pc-msdosdjgpp, + label: djgpp-i386-build, libs: libc-djgpp-dev libwatt-djgpp-dev djgpp-utils, target: no-threads 386 DJGPP, tests: none, ppa: jwt27/djgpp-toolchain }, { arch: aarch64-linux-gnu, + label: aarch64, libs: libc6-dev-arm64-cross, target: linux-aarch64, fips: no }, { arch: alpha-linux-gnu, + label: alpha, libs: libc6.1-dev-alpha-cross, target: linux-alpha-gcc, fips: no }, { arch: arm-linux-gnueabi, + label: armel, libs: libc6-dev-armel-cross, target: linux-armv4, fips: no, tests: -test_includes -test_store -test_x509_store }, { arch: arm-linux-gnueabihf, + label: armhf, libs: libc6-dev-armhf-cross, target: linux-armv4, fips: no, @@ -104,40 +110,47 @@ jobs: # gcc hppa seems to have some potential compiler issues # with -O2 on this platform, reduce optimization to -01 arch: hppa-linux-gnu, + label: hppa-static, libs: libc6-dev-hppa-cross, target: -static -O1 -mlong-calls linux-generic32, fips: no, tests: -test_includes -test_store -test_x509_store }, { arch: m68k-linux-gnu, + label: m68k-static, libs: libc6-dev-m68k-cross, target: -static -m68040 linux-latomic -Wno-stringop-overflow, fips: no, tests: -test_includes -test_store -test_x509_store }, { arch: mips-linux-gnu, + label: mips-static, libs: libc6-dev-mips-cross, target: -static linux-mips32, fips: no, tests: -test_includes -test_store -test_x509_store }, { arch: mips64-linux-gnuabi64, + label: mips64-static, libs: libc6-dev-mips64-cross, target: -static linux64-mips64, fips: no }, { arch: mipsel-linux-gnu, + label: mipsel, libs: libc6-dev-mipsel-cross, target: linux-mips32, fips: no, tests: -test_includes -test_store -test_x509_store }, { arch: powerpc64le-linux-gnu, + label: ppc64le, libs: libc6-dev-ppc64el-cross, target: linux-ppc64le, fips: no }, { arch: riscv64-linux-gnu, + label: riscv64, # Pin the vector spec version, otherwise qemu-user emits a # "vector version is not specified" warning on stderr at every # process start, which upsets tests that parse or check stderr. @@ -156,6 +169,7 @@ jobs: # z900 zeros every CPACF vector and all stfle facility bits (no VX), # so OpenSSL uses the pure-software scalar fallback paths. arch: s390x-linux-gnu, + label: s390x-z900, libs: libc6-dev-s390x-cross, target: linux64-s390x, fips: no, @@ -165,6 +179,7 @@ jobs: # Build-only: verify no-asm does not produce undefined references to # OPENSSL_s390xcap_P (which is only compiled when asm is enabled). arch: s390x-linux-gnu, + label: s390x-noasm-build, libs: libc6-dev-s390x-cross, target: no-shared no-asm linux64-s390x, fips: no, @@ -285,6 +300,7 @@ jobs: label: s390x-clang-z10-vx-on-fips }, { arch: sh4-linux-gnu, + label: sh4, libs: libc6-dev-sh4-cross, target: no-async linux-latomic, fips: no, @@ -296,21 +312,25 @@ jobs: # code base. { arch: hppa-linux-gnu, + label: hppa-build, libs: libc6-dev-hppa-cross, target: linux-generic32, tests: none }, { arch: m68k-linux-gnu, + label: m68k-cfv4e-build, libs: libc6-dev-m68k-cross, target: -mcfv4e -mxgot linux-latomic -Wno-stringop-overflow no-quic, tests: none }, { arch: mips-linux-gnu, + label: mips-build, libs: libc6-dev-mips-cross, target: linux-mips32, tests: none }, { arch: mips64-linux-gnuabi64, + label: mips64-build, libs: libc6-dev-mips64-cross, target: linux64-mips64, tests: none @@ -319,6 +339,7 @@ jobs: # This build doesn't execute either with or without shared libraries. { arch: sparc64-linux-gnu, + label: sparc64-build, libs: libc6-dev-sparc64-cross, target: linux64-sparcv9, tests: none diff --git a/.github/workflows/riscv-more-cross-compiles.yml b/.github/workflows/riscv-more-cross-compiles.yml index 57558660138..73d3dd28713 100644 --- a/.github/workflows/riscv-more-cross-compiles.yml +++ b/.github/workflows/riscv-more-cross-compiles.yml @@ -59,6 +59,7 @@ jobs: check_run_id: ${{ inputs.check_run_id }} cross-compilation-riscv: + name: cross-compilation-riscv (${{ matrix.platform.label }}) # pull request title contains 'riscv' # pull request title contains 'RISC-V' # pull request body contains '[riscv ci]' @@ -86,6 +87,7 @@ jobs: # to never run the tests, otherwise its value is passed to # the "make test" command to allow selective disabling of # tests. + # label: short unique name for the entry, used in the job name. # qemucpu: optional; string that describes CPU properties. # The string will be used to set the QEMU_CPU variable. # opensslcapsname: optional; string that describes the postfix of the @@ -110,6 +112,7 @@ jobs: # crypto/sha/asm/sha512-riscv64-zbb.pl # crypto/sm3/asm/sm3-riscv64-zbb.pl arch: riscv64-linux-gnu, + label: zbb-zbc-zbkb-zknd-zkne, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -120,6 +123,7 @@ jobs: # RV64GC ZBC ZBB, but without ZBKB # crypto/modes/gcm128.c arch: riscv64-linux-gnu, + label: zbc-zbb, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -130,6 +134,7 @@ jobs: # RV64GC ZBC, but without ZBB/ZBKB # crypto/modes/gcm128.c arch: riscv64-linux-gnu, + label: zbc, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -142,6 +147,7 @@ jobs: # For chacha20 vector-only path from #24069 # crypto/chacha/asm/chacha-riscv64-v-zbb.pl arch: riscv64-linux-gnu, + label: v-zbb, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -152,6 +158,7 @@ jobs: # RV64GC V ZVKG, but without ZVKB # crypto/modes/gcm128.c arch: riscv64-linux-gnu, + label: v-zvkg, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -165,6 +172,7 @@ jobs: # RV64GC V ZVKB ZVBC, but without ZVKG # crypto/modes/gcm128.c arch: riscv64-linux-gnu, + label: v-zvkb-zvbc, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -181,6 +189,7 @@ jobs: # providers/implementations/ciphers/cipher_aes_hw_rv64i.inc # providers/implementations/ciphers/cipher_aes_gcm_hw_rv64i.inc arch: riscv64-linux-gnu, + label: v-zvkned, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -201,6 +210,7 @@ jobs: # crypto/sha/asm/sha256-riscv64-zvkb-zvknha_or_zvknhb.pl # crypto/sha/asm/sha512-riscv64-zvkb-zvknhb.pl arch: riscv64-linux-gnu, + label: all-vlen128, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -212,6 +222,7 @@ jobs: # crypto/sha/asm/sha512-riscv64-zvkb-zvknhb.pl # crypto/sm3/asm/sm3-riscv64-zvksh.pl arch: riscv64-linux-gnu, + label: all-vlen256, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -223,6 +234,7 @@ jobs: # crypto/sha/asm/sha512-riscv64-zvkb-zvknhb.pl # crypto/sm3/asm/sm3-riscv64-zvksh.pl arch: riscv64-linux-gnu, + label: all-vlen512, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -242,6 +254,7 @@ jobs: # zksh: # crypto/sm3/sm3_local.h arch: riscv64-linux-gnu, + label: inlineasm, libs: libc6-dev-riscv64-cross, target: -march=rv64gc_zbb_zbkb_zknh_zksh linux64-riscv64, fips: no, @@ -254,6 +267,7 @@ jobs: # V is absent so AT_HWCAP V bit is clear (VECTOR_CAPABLE=false). # The rv64 CPU model includes ZBB/ZBC/ZBS/ZBKB by default. arch: riscv64-linux-gnu, + label: novector-hwprobe, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, @@ -267,6 +281,7 @@ jobs: # Forces the hwprobe_to_cap() code path (skipped when OPENSSL_riscvcap is set). # V is present so AT_HWCAP V bit is set (VECTOR_CAPABLE=true). arch: riscv64-linux-gnu, + label: v-zvkned-hwprobe, libs: libc6-dev-riscv64-cross, target: linux64-riscv64, fips: no, -- cgit